Electrical isolation barriers can be identified in many industrial, medical and communication applications where it is necessary to electrically isolate one section of electronic circuitry from another electronic section. In this context, isolation exists between two sections of electronic circuitry if a large magnitude voltage source (typically on the order of 1000 volts or more) connected between any two circuit nodes separated by the barrier causes less than a minimal amount of current flow (typically on the order of 10 milliamperes or less) through the voltage source. An electrical isolation barrier must exist, for example, in communication circuitry that connects directly to the standard two-wire public switched telephone network and that is powered through a standard residential wall outlet.
Direct Access Arrangement (DAA) circuitry may be used to terminate the telephone connections at a phone line user's end to provide a communication path for signals to and from the phone lines. DAA circuitry includes the necessary circuitry to terminate the telephone connections at the user's end and may include, for example, an isolation barrier, DC termination circuitry, AC termination circuitry, ring detection circuitry, and processing circuitry that provides a communication path for signals to and from the phone lines. It is also desirable that the DAA circuitry act as an isolation barrier to meet the requirements of FCC regulations, Part 68. Examples of DAA circuitry known in the art may be found described in U.S. Pat. No. 6,198,816, U.S. Pat. No. 6,298,133, U.S. Pat. No. 6,385,235 and in U.S. patent application Ser. No. 09/347,688 filed Jan. 2, 1999 and entitled “DIGITAL ACCESS ARRANGEMENT CIRCUITRY AND METHOD HAVING A SYNTHESIZED RINGER IMPEDANCE FOR CONNECTING TO PHONE LINES” by Tuttle et al., the disclosure of each being incorporated herein by reference.
In traditional DAA designs, a separate interface and circuit is typically required for each of loop voltage monitoring, ring burst detection and caller-ID demodulation. This is generally due to the significantly different voltage levels and frequencies involved in these signaling schemes. Furthermore, the ringer interface is often nonlinear which makes it unsuitable for measuring loop voltage or detecting caller-ID data. Implementing three interfaces requires numerous high voltage external components that increases both cost and board space usage. The separate circuits required also consume considerable power.
Loop voltage levels on the TIP and RING lines may be monitored for a number of reasons. For example, such levels may be utilized for on-hook or off-hook intrusion detection or determining other states of the phone line. Exemplary uses of DC loop voltage (also called DC line voltage) data may be seen in co-pending U.S. patent application Ser. No. 09/603,037, filed Jun. 26, 2000 and entitled “INTEGRATED MODEM AND LINE-ISOLATION CIRCUITRY AND ASSOCIATED METHOD HAVING INTRUSION DETECTION” by Timothy J. Dupuis, which is incorporated herein by reference.
In the past, a capacitive interface has been used to connect the ringer circuitry on the phone line side of the DAA directly to the TIP/RING Lines as described in U.S. Pat. No. 6,198,816. The capacitive interface linearly attenuates the TIP/RING signal voltage from high phone lines levels (typically 40–140 Vrms, 15–68 Hz) to levels within integrated circuit technology limitations. Because the interface provides a linear signal, it may also be connected to caller ID circuitry to demodulate caller ID data as described in U.S. Pat. No. 6,298,133, which has been incorporated herein by reference. The use of common inputs for the ringer circuitry and the caller-ID circuitry eliminates the need for a separate caller ID interface. However, the interface cannot pass DC signals, and a separate interface is required for loop voltage monitoring. This has typically been accomplished using a resistive interface connected to the hook switch circuitry.
An example of a prior art telephone system utilizing capacitive isolation barriers and configured for performing ring burst detection and caller-ID demodulation or analog to digital conversion is described below with reference to FIGS. 3 and 4. As illustrated, this system employs one interface for the separate ringer circuitry and the separate caller-ID circuitry. Not shown in FIGS. 3 and 4 is an additional interface and separate circuitry employed for loop voltage monitoring. Thus, in this prior art telephone system, two unique interfaces and three separate circuits are used to perform loop voltage monitoring, ring burst detection and caller-ID demodulation or analog to digital conversion.
As shown in FIG. 3, the TIP line 1602 and RING line 1604 are provided to the prior art communication system 110. The diode bridge 1606 receives the TIP line 1602 and RING line 1604 and provides an output to the external hookswitch devices 1702. A communication line 1705 couples the external hookswitch devices to the line side circuits 118. The line side circuits 118 are circuits isolated from external powers sources, such as power source 112, by an isolation barrier 120. The isolation barrier 120 may be a capacitive isolation barrier as previously described.
As shown in the prior art configuration of FIG. 3, phone line interface circuitry, such as a hookswitch, caller ID and ringer interface circuit 1704 is provided within the line side circuitry 118. The hookswitch, caller ID and ringer interface circuitry 1704 is coupled to the external hookswitch devices through line 1705 and ground through line 1707. The phone line loop current utilized by the line side circuits 118 is shown as Iloop. Circuitry 1704 is also coupled directly to the TIP line 1602 and the RING line 1604 through a capacitive interface 1703. The capacitive interface 1703 may be comprised of three high voltage (such as 300 V) capacitors 1703a, 1703b, and 1703c having capacitances of 2200 pF, 2200 pF and 5600 pF respectively, and linearly attenuates the TIP/RING signal voltage from high phone lines levels (typically 40–140 Vrms, 15–68 Hz) to levels within integrated circuit technology limitations. Bi-directional input/output lines 1706 are shown provided from the hookswitch, caller ID and ringer interface circuitry 1704 for communication through the isolation barrier 120 to the user powered circuits 116.
The user powered circuits 116 of prior art communication system 110 include ringer timing circuitry 1708. The ringer timing circuitry may bidirectionally communicate through line 1710 and the isolation barrier 120 to ringer circuits within the hookswitch, caller ID and ringer interface circuitry 1704 in the line side circuit 118. The ring detection output is provided on output line 1719 to a ring detection output pin 1720 of the user powered circuit 116. Alternatively, the ring detection output 1719 may be provided at the analog-to-digital converter (“ADC”) data port pin 1718 by use of a mux 1716. Mux 1716 may be utilized to multiplex the ringer detection output 1719 and a signal line 1712 containing caller ID data from an ADC output from the line side circuit 118. The mux 1716 may operate in response to a caller ID field signal 1714 so that when caller ID information is present on the TIP and RING lines, caller ID information is presented at the ADC data port pin 1718 and when ringing information is present on the TIP and RING lines, ring detection information is presented at the ADC data port pin 1718. In this manner the ADC data port may reflect activity on the TIP/RING loop during ringing, caller ID fields, and off-hook operations.
FIG. 4 illustrates a more detailed view of some of the circuits of the hookswitch, caller ID and ringer interface circuitry 1704 of prior art communication system 110. As shown in FIG. 4, input line 1705 provides the TIP and RING signal information to integrated hookswitch circuits 1810. The integrated hookswitch circuits 1810 are those portions of the hookswitch circuitry integrated within the line side integrated circuit 118 (as opposed to portions of the hookswitch circuitry which may be off chip as designated by the external hookswitch devices 1702 as shown in FIG. 3). The ground line 1707 is also coupled to the integrated hookswitch circuits 1810. The TIP and RING information is also coupled into circuitry 1704 through a capacitive interface 1703. The TIP and RING information coupled through the capacitive interface 1703 may be provided to a ringer burst circuit 1802 and to a mux 1812. The mux 1812 operates in response to a control signal 1815. The control signal 1815 may be provided to indicate when caller ID information is present on the TIP and RING lines. Thus when caller ID information is present on the phone line, the caller ID information may be provided from the TIP and RING lines to an ADC 1814 for conversion to digital data which may then be transmitted across the isolation barrier 120. In other cases when caller ID information is not present (such as in an offhook situation), the mux 1812 may provide data from the integrated hookswitch circuits to the ADC 1814 for conversion to digital data which may then be transmitted across the isolation barrier 120. A power supply line 1816 may be provided to a variety of circuits such as the mux 1812 and the ADC 1814 from power obtained from the phone line through the hookswitch circuits. The power may be supplied even in conditions when the hookswitch is not normally closed (an on-hook condition). Bi-directional communication from the ringer burst circuit 1802 to the user powered circuit 116 may be provided on communication line 1817 through the isolation barrier as also discussed below in further detail.
As shown in FIG. 4, outputs 1703d and 1703e of the capacitive interface 1703 are coupled to ringer burst circuitry 1802 and are also connected to caller ID circuitry input lines 1804 and 1806 so that accurate caller ID data from the TIP/RING signals may be present on caller ID input lines 1804 and 1806, with the caller ID information being then provided from lines 1804 and 1806 to a mux 1812. In an alternate prior art configuration (not shown), a separate dedicated ADC may be coupled to capacitive interface outputs 1703d and 1703e for receiving, digitally converting and transmitting caller ID data across isolation barrier 120, i.e., rather than using ADC 1814 for this purpose. As further shown with respect to the prior art communication of FIGS. 3 and 4, loop current (Iloop) may be drawn from the TIP line 1602 and the RING line 1604 through interface lines 1705 and 1707, with virtually no (less than 10 uA) loop current being drawn during a ringing burst and only on-hook loop current being drawn during the caller ID field.
FIG. 5 illustrates an alternative prior art implementation of a combined ringer/caller-ID interface and associated circuitry 500 that may be implemented in a telephone system that employs two unique interfaces and three separate circuits to perform loop voltage monitoring, ring burst detection and caller-ID demodulation or analog to digital conversion. In FIG. 5, components to the left of the dotted line are off-chip and elements to the right are implemented on the line side chip of DAA circuitry. As illustrated, caller ID circuitry 510 and ringer circuitry 530 are coupled to the TIP and RING lines through a capacitive interface 550 that includes capacitors C1 (i.e., C1A, C1B) and C2. Capacitive interface 550 functions in a manner similar to capacitive interface 1703 of FIG. 4. The linear division factor is set by the ratio of C1 to C2 and is typically selected to insure that the DAA circuitry does not overload before the maximum ring threshold is exceeded. R1 determines the corner frequency of the highpass filter formed by R1, C1, and C2 and is typically selected such that the lowest frequency ring burst is passed without significant attenuation. R2 is utilized to protect the PAD diodes in the line side chip from excessive current during lightning strikes or other surges.
As illustrated in FIG. 5, one interface is shared between the ringer and caller-ID functions, however separate circuitry is used on chip. In this regard, the ringer circuit is a simple window comparator 530 that detects when the voltage on the line exceeds a certain preset positive or negative threshold thus causing ring detection signals RDTP or RDTN to go high, respectively. These signals are then sent across the isolation barrier of the DAA circuitry to circuitry within the system side chip that performs ring validation and generates timing signals indicating the location of caller-ID data between the first and second ring burst. As illustrated in FIG. 5, the much smaller magnitude caller-ID signals are converted to digital format in a 2nd order delta-sigma ADC 510 coupled to the interface through gain block 520. The resulting bit stream is sent across the isolation barrier to the system side chip for decimation or analog to digital conversion of the caller-ID data.
Still referring to the prior art implementation of FIG. 5, the placement of the more complex ring validation, timing, decimation, and caller-ID decoding circuitry on the system side chip results in lower power dissipation on the line side. This is desirable since it minimizes the circuitry on the line side chip, which decreases the amount of power that must be transmitted across the isolation barrier and minimizes the common-mode noise transmitted to the TIP/RING lines.
Although not shown in FIGS. 3–5, prior art loop voltage interface and circuitry have been implemented in such prior art systems using components both on and off the line side chip. In such prior art circuitry, the loop voltage is converted to digital format in a simple switched capacitor dual-slope counting ADC. The resulting PCM data is sent across the isolation barrier to the system side chip. Further details on such prior art loop voltage interface and circuitry may be found in co-pending U.S. patent application Ser. No. 09/603,037, filed Jun. 26, 2000 and entitled “INTEGRATED MODEM AND LINE-ISOLATION CIRCUITRY AND ASSOCIATED METHOD HAVING INTRUSION DETECTION” by Timothy J. Dupuis.
To summarize, in previous DAA implementations at least two unique interfaces and three separate circuits are required to simultaneously perform loop voltage monitoring, ring burst detection, and caller-ID demodulation. With regard to the combined ringer/caller-ID interface and circuitry shown in FIG. 5, three external capacitors and four external resistors are required. Furthermore, high voltage capacitors (e.g. 300 v) employed in the capacitive interface of prior art telephone communication systems are relatively expensive. In addition, large ring signals or a battery reversal can cause the protection diodes in the line side chip to turn on resulting in charge storage in the external capacitors. Once the protection diodes turn on the capacitive voltage divider ceases to operate linearly. Since caller-ID data should be processed within 100 msec of a battery reversal, some means must be provided to squelch or reset, the charge on these capacitors after an over voltage event. With regard to the loop voltage interface and circuitry of the prior art, the hookswitch must be off (i.e., telephone device on hook) in order to measure the loop voltage since the interface is shared with the hookswitch circuits.